Intellectual property protection of sequential circuits using digital watermarking

The aspect of intellectual property protection (IPP) has created a deep concern in recent years which has forced the IP owners to incorporate some sort of signature or watermark in their designs [1]. In this regard, Oliveira have suggested a technique of modifying the state transition graph (STG) of sequential circuits incorporating digital watermark in such a way that it is impossible for anyone to even imagine that the watermark exists in the design. Moreover, it assists the IP owner to prove in a court of law his ownership in case of suspected piracy of the design [2]. We have used this technique on a 5-bit sequence detector with a 3-bit signature that helps to detect the piracy. The comparison of simulation results of both watermarked and non-watermarked circuit, using ModelSim simulator, indicate no change in the maximum operating frequency of the circuit. This is the outcome of our work and has not been reported in the literature earlier. Also, the test results of piracy detection circuit confirm that only one output of this detection circuit can monitor the internal state of the sequential machine, thereby detecting the piracy. The details of these are presented in this paper.