A 13.1-to-28GHz Fractional-N PLL in 32nm SOI CMOS with a ΔΣ Noise-Cancellation Scheme

被引：0
|
作者：
Ferriss, Mark [1 ]
Sadhu, Bodhisatwa [1 ]
Rylyakov, Alexander [1 ]
Ainspan, Herschel [1 ]
Friedman, Daniel [1 ]
机构：
[1] IBM Res, Yorktown Hts, NY 10598 USA
来源：
2015 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE DIGEST OF TECHNICAL PAPERS (ISSCC) | 2015年 / 58卷
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中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
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页码：192 / U267
页数：3
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