Design and implementation of adaptive service edge router

被引：0
|
作者：
Kim, E [1 ]
Chun, W [1 ]
Kyoung, LY [1 ]
机构：
[1] Raonet Syst Inc, Adv Technol Res Ctr 406, Songnam 463816, Gyunggi Do, South Korea
来源：
8th International Conference on Advanced Communication Technology, Vols 1-3: TOWARD THE ERA OF UBIQUITOUS NETWORKS AND SOCIETIES | 2006年
关键词：
ASER; edge router; network processor; integrated packet-processing pipeline;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
A next generation service edge router, Adaptive Service Edge Router (ASER), is presented in this paper. The ASER is designed to meet more complicated requirements of rapidly evolving network by adopting advanced technology such as network processor, separation of control plane and data plane, ForCES and FEA concept. The ASER can be deployed as a service edge router, which provides adaptive and flexible solution to new requirements in the next generation network.
引用
收藏
页码：U1004 / U1008
页数：5
相关论文
共 50 条
  • [1] THE CHAOS ROUTER CHIP - DESIGN AND IMPLEMENTATION OF AN ADAPTIVE ROUTER
    BOLDING, K
    CHEUNG, SC
    CHOI, SE
    EBELING, C
    HASSOUN, S
    NGO, TA
    WILLE, R
    [J]. VLSI 93, 1994, 42 : 311 - 320
  • [2] Design and Implementation of On-chip Adaptive Router with Predictor for Regional Congestion
    Taniguchi, Masakazu
    Matsutani, Hiroki
    Yamasaki, Nobuyuki
    [J]. 2011 IEEE 17TH INTERNATIONAL CONFERENCE ON EMBEDDED AND REAL-TIME COMPUTING SYSTEMS AND APPLICATIONS (RTCSA 2011), VOL 2, 2011, : 22 - 27
  • [3] The design and implementation of a Cartesian router
    Farajmandi, M
    Hughes, L
    [J]. Proceedings of the 3rd Annual Communication Networks and Services Research Conference, 2005, : 84 - 90
  • [4] Design and implementation of a distributed router
    Hagsand, O
    Hidell, M
    Sjödin, P
    [J]. 2005 IEEE International Symposium on Signal Processing and Information Technology (ISSPIT), Vols 1 and 2, 2005, : 227 - 232
  • [5] An Adaptive Edge Router Enabling Internet of Things
    Jutila, Mirjami
    [J]. IEEE INTERNET OF THINGS JOURNAL, 2016, 3 (06): : 1061 - 1069
  • [6] Design and implementation of one fully adaptive router on 2D-mesh
    [J]. Deng, B., 2000, Chinese Institute of Electronics (28):
  • [7] Mathematical modelling for the design of an edge router
    Bhattacharjee, Partha
    Sanyal, Goutam
    [J]. PROCEEDINGS OF NINTH ACIS INTERNATIONAL CONFERENCE ON SOFTWARE ENGINEERING, ARTIFICIAL INTELLIGENCE, NETWORKING AND PARALLEL/DISTRIBUTED COMPUTING, 2008, : 212 - +
  • [8] Design and Implementation of a QoS Router on FPGA
    Zheng, Guohai
    Gu, Huaxi
    Yang, Yintang
    Du, Keming
    Xu, Shilong
    [J]. 2011 INTERNATIONAL CONFERENCE ON COMPUTER SCIENCE AND NETWORK TECHNOLOGY (ICCSNT), VOLS 1-4, 2012, : 1837 - 1840
  • [9] Design and Implementation of Router for NOC on FPGA
    Verma, Gaurav
    Agarwal, Harsh
    Singh, Shreya
    Khanam, Shaheem Nighat
    Gupta, Prateek Kumar
    Jain, Vishal
    [J]. INTERNATIONAL JOURNAL OF FUTURE GENERATION COMMUNICATION AND NETWORKING, 2016, 9 (12): : 263 - 271
  • [10] Router Design and Implementation for a Polymorphic Multimedia Processor
    Yang, Ting
    Li, Tao
    Wang, Ya-Gang
    Qian, Bo-Wen
    Liu, Yu-Rong
    [J]. PROCEEDINGS OF 3RD INTERNATIONAL CONFERENCE ON MULTIMEDIA TECHNOLOGY (ICMT-13), 2013, 84 : 1292 - 1300
12345