Circuit partitioning based fingerprinting method for IP protection

被引:1
|
作者
Nie, Tingyuan [1 ]
Sun, Jie [1 ]
Ji, Aiguo [1 ]
Lu, Zhe-Ming [2 ]
机构
[1] Qingdao Technol Univ, Commun & Elect Engn Inst, Qingdao 266033, Peoples R China
[2] Zhejiang Univ, Sch Aeronaut & Astronaut, Hangzhou 310027, Zhejiang, Peoples R China
来源
IEICE ELECTRONICS EXPRESS | 2013年 / 10卷 / 07期
关键词
fingerprinting; intellectual property protection (IPP); circuit partitioning;
D O I
10.1587/elex.10.20130138
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The continuously widening design productivity gap in the past few decades gives high incentives to counterfeiting ICs. Existing intellectual property (IP) protection schemes demand high overheads, and some techniques like watermarking do not facilitate tracing of illegal users. In this letter, we propose a novel fingerprinting method based on post-processing on circuit partitions. We evaluate our method on the ISPD98 benchmark suite. The experimental results demonstrate the effectiveness of the proposal. The fingerprinting design is distinct because the Hamming distance between fingerprinted IP designs is large enough to resist a collusion attack.
引用
收藏
页数:6
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