Incorporating Hardware-in-the-Loop Simulation Into a Roadmap for the Navy's Digital Twin Paradigm

被引：0

作者：

Steurer, Michael ^{[1
]}

Stanovich, Mark ^{[1
]}

Soto, Dionne ^{[1
]}

Kane, Vince ^{[2
]}

机构：

[1] Florida State Univ, Ctr Adv Power Syst, Tallahassee, FL 32306 USA

[2] NAVSEA PMS320, Washington, DC USA

来源：

NAVAL ENGINEERS JOURNAL | 2020年 / 132卷 / 01期

关键词：

D O I：

暂无

中图分类号：

U6 [水路运输]; P75 [海洋工程];

学科分类号：

0814 ; 081505 ; 0824 ; 082401 ;

摘要：

Since 2004, the Center for Advanced Power Systems (CAPS) at the Florida State University (FSU) pioneered the method of power hardware-in-the-loop (PHIL) simulation as a means to de-risk the integration of new technologies into systems. This article discusses "digital twin" in the context of shipboard integrated power and energy system development and describes three real-time simulation example systems. Thoughts and suggestions for creating a successful path forward are offered.

引用

页码：57 / 61

页数：5

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