Single-Event Upset Tolerance Study of a Low-Voltage 13T Radiation-Hardened SRAM Bitcell

被引:0
|
作者
Scheuer, Kevin [1 ,2 ]
Holmes, Jason [1 ,2 ]
Galyaev, Evgeny [1 ]
Blyth, David [1 ,2 ]
Alarcon, Ricardo [2 ]
机构
[1] Radiat Detect & Imaging RDI, Tempe, AZ 85281 USA
[2] Arizona State Univ, Phys Sci F Wing, Tempe, AZ 85287 USA
关键词
Single event upsets; Transistors; SRAM cells; Radiation hardening (electronics); Low voltage; 13T bitcell; radiation hardening by design (RHBD); single-event upset (SEU); static random-access memory (SRAM); NEUTRON; GAMMA; IRRADIATION;
D O I
10.1109/TNS.2020.2996536
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The 13T static random-access memory (SRAM) cell was designed as a low-voltage single-event upset (SEU)-tolerant device for ultralow power space applications, showing full read and write functionality down to the subthreshold voltage of 300 mV. In order to assess the SEU hardness of the device experimentally, it was tested under heavy-ion beams at the Cyclotron Resource Center, Louvain-la-Neuve, Belgium. After irradiation, bit upsets from "1" to "0" were observed, whereas bit upsets from "0" to "1" were extremely rare. Since multiple upsets occurred within addresses, we assume that in addition to random ion hits on the memory cells, the reason for the high SEU rate is ions impinging on the nonhardened peripheral circuitry. Furthermore, heavy-ion experiments and Monte Carlo simulations were performed in order to clarify the upset mechanism.
引用
收藏
页码:1846 / 1851
页数:6
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