Tunable Negative Differential Resistance Effect in a-SZTO/Dielectric/ SZTO Heterostructure TFTs at Room Temperature

被引:0
|
作者
Murugan, Balaji [1 ,2 ]
Lee, Sang Yeol [3 ,4 ]
机构
[1] Dongguk Univ Seoul, Dept Semicond Sci, Seoul 04620, South Korea
[2] Dongguk Univ Seoul, Quantum Funct Semicond Res Ctr, Seoul 04620, South Korea
[3] Gachon Univ, Dept Elect Engn, Seongnam Si 13120, Gyeonggi Do, South Korea
[4] Gachon Univ, Gachon Adv Inst Semicond Technol, Seongnam Si 13120, Gyeonggi Do, South Korea
关键词
negative differential resistance; resonant tunneling; heterostructure; peak-to-valley current ratio; heterostructure TFT; a-SZTO; RESONANT-TUNNELING DIODE; HIGH-CURRENT DENSITY; WAALS; PERFORMANCE; TRANSISTOR;
D O I
10.1021/acsaelm.3c00178
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We experimentally demonstrate the resonant tunneling and negative differential resistance (NDR) in a-SZTO/ dielectric/SZTO heterostructure thin film transistors (TFTs) at room temperature (RT) for the first time. Here, we study the resonant tunneling and the NDR tunability for different middle-layer dielectric and gate biases. The dielectric materials of HfO2, ZrO2, and MgO are used in the a-SZTO/dielectric/SZTO heterostructure devices and are named SHS, SZS, and SMS in this work. The resonant tunneling through an insulator occurs when the energy bands of the two amorphous-SiZnSnO (a-SZTO) are aligned. The previous results of NDR based on resonant tunneling were obtained only using two-dimensional (2D) materials. But we observe the NDR results with a peak-to-valley current ratio (PVCR) of 3 at RT by utilizing the bulk (three-dimensional, 3D) oxide materials for the first time in this work.
引用
收藏
页码:2345 / 2350
页数:6
相关论文
共 50 条
  • [1] Observation of negative differential resistance in GaAlAs single-barrier heterostructure at room temperature
    Emelett, SJ
    Goodhue, WD
    Karakashian, AS
    Vaccaro, K
    [J]. JOURNAL OF APPLIED PHYSICS, 2004, 95 (05) : 2930 - 2932
  • [2] ROOM-TEMPERATURE SWITCHING AND NEGATIVE DIFFERENTIAL RESISTANCE IN THE HETEROSTRUCTURE HOT-ELECTRON DIODE
    HIGMAN, TK
    MILLER, LM
    FAVARO, ME
    EMANUEL, MA
    HESS, K
    COLEMAN, JJ
    [J]. APPLIED PHYSICS LETTERS, 1988, 53 (17) : 1623 - 1625
  • [3] Tunable Negative Differential Resistance in van der Waals Heterostructures at Room Temperature by Tailoring the Interface
    Fan, Sidi
    Quoc An Vu
    Lee, Sanshyub
    Thanh Luan Phan
    Han, Gyeongtak
    Kim, Young-Min
    Yu, Woo Jong
    Lee, Young Hee
    [J]. ACS NANO, 2019, 13 (07) : 8193 - 8201
  • [4] Graphene Negative Differential Resistance Circuit With Voltage-Tunable High Performance at Room Temperature
    Sharma, Pankaj
    Bernard, Laurent Syavoch
    Bazigos, Antonios
    Magrez, Arnaud
    Ionescu, Adrian Mihai
    [J]. IEEE ELECTRON DEVICE LETTERS, 2015, 36 (08) : 865 - 867
  • [5] Room temperature negative differential resistance in molecular nanowires
    Kratochvilova, I
    Kocirik, M
    Zambova, A
    Mbindyo, J
    Mallouk, TE
    Mayer, TS
    [J]. JOURNAL OF MATERIALS CHEMISTRY, 2002, 12 (10) : 2927 - 2930
  • [6] Room-Temperature Negative Capacitance in a Ferroelectric Dielectric Super lattice Heterostructure
    Gao, Weiwei
    Khan, Asif
    Marti, Xavi
    Nelson, Chris
    Serrao, Claudy
    Ravichandran, Jayakanth
    Ramesh, Ramamoorthy
    Salahuddin, Sayeef
    [J]. NANO LETTERS, 2014, 14 (10) : 5814 - 5819
  • [7] Negative Differential Resistance Effect in "Cold" Metal Heterostructure Diodes
    Yin, Yiheng
    Shao, Chen
    Guo, Hailing
    Robertson, John
    Zhang, Zhaofu
    Guo, Yuzheng
    [J]. IEEE ELECTRON DEVICE LETTERS, 2022, 43 (03) : 498 - 501
  • [8] Negative differential resistance in GaN nanocrystals above room temperature
    Chitara, Basant
    Jebakumar, D. S. Ivan
    Rao, C. N. R.
    Krupanidhi, S. B.
    [J]. NANOTECHNOLOGY, 2009, 20 (40)
  • [9] Negative differential resistance in porous silicon devices at room temperature
    Marin, Oscar
    Toranzos, Victor
    Urteaga, Raul
    Comedi, David
    Koropecki, Roberto R.
    [J]. SUPERLATTICES AND MICROSTRUCTURES, 2015, 79 : 45 - 53
  • [10] Room-Temperature Negative Differential Resistance in Graphene Field Effect Transistors: Experiments and Theory
    Sharma, Pankaj
    Bernard, Laurent Syavoch
    Bazigos, Antonios
    Magrez, Arnaud
    Ionescu, Adrian M.
    [J]. ACS NANO, 2015, 9 (01) : 620 - 625