Al2O3 Layers Grown by Atomic Layer Deposition as Gate Insulator in 3C-SiC MOS Devices

被引:3
|
作者
Schiliro, Emanuela [1 ]
Fiorenza, Patrick [1 ]
Lo Nigro, Raffaella [1 ]
Galizia, Bruno [1 ]
Greco, Giuseppe [1 ]
Di Franco, Salvatore [1 ]
Bongiorno, Corrado [1 ]
La Via, Francesco [1 ]
Giannazzo, Filippo [1 ]
Roccaforte, Fabrizio [1 ]
机构
[1] CNR, Ist Microelettron & Microsistemi CNR IMM, Str 8 5, I-95121 Catania, Italy
关键词
high-& kappa; dielectrics; ALD; WBG; 3C-SiC; SILICON-CARBIDE; PLASMA; QUALITY; DIELECTRICS; DEFECTS;
D O I
10.3390/ma16165638
中图分类号
O64 [物理化学(理论化学)、化学物理学];
学科分类号
070304 ; 081704 ;
摘要
Metal-oxide-semiconductor (MOS) capacitors with Al2O3 as a gate insulator are fabricated on cubic silicon carbide (3C-SiC). Al2O3 is deposited both by thermal and plasma-enhanced Atomic Layer Deposition (ALD) on a thermally grown 5 nm SiO(2 )interlayer to improve the ALD nucleation and guarantee a better band offset with the SiC. The deposited Al2O3/SiO2 stacks show lower negative shifts of the flat band voltage VFB (in the range of about -3 V) compared with the conventional single SiO2 layer (in the range of -9 V). This lower negative shift is due to the combined effect of the Al2O3 higher permittivity (e = 8) and to the reduced amount of carbon defects generated during the short thermal oxidation process for the thin SiO2. Moreover, the comparison between thermal and plasma-enhanced ALD suggests that this latter approach produces Al2O3 layers possessing better insulating behavior in terms of distribution of the leakage current breakdown. In fact, despite both possessing a breakdown voltage of 26 V, the T-ALD Al2O3 sample is characterised by a higher current density starting from 15 V. This can be attributable to the slightly inferior quality (in terms of density and defects) of Al2O3 obtained by the thermal approach and, which also explains its non-uniform dC/dV distribution arising by SCM maps.
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页数:10
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