Carbon nanotube network film-based field-effect transistor interface state optimization by ambient air annealing

被引:2
|
作者
Hou, Zhenfei [1 ]
Liu, Yiwei [2 ]
Niu, Gang [3 ]
Sun, Yanxiao [3 ]
Li, Jie [1 ]
Zhao, Jinyan [3 ]
Wu, Shengli [1 ]
机构
[1] Xi An Jiao Tong Univ, Key Lab Phys Elect & Devices, Minist Educ, Sch Elect Sci & Engn,Fac Elect & Informat Engn, Xian 710049, Peoples R China
[2] Xiangtan Univ, Dept Phys, Hunan Inst Adv Sensing & Informat Technol, Xiangtan 411105, Peoples R China
[3] Xi An Jiao Tong Univ, Elect Mat Res Lab, Key Lab, Minist Educ,Int Ctr Dielect Res,Sch Elect Sci & En, Xian 710049, Peoples R China
基金
国家重点研发计划;
关键词
HYSTERESIS; ENERGY;
D O I
10.1063/5.0135500
中图分类号
O59 [应用物理学];
学科分类号
摘要
Carbon nanotube field-effect transistors (CNTFETs) have been considered a strong candidate for post-Si era electronics due to the virtues of higher speed, lower power consumption, and multiple functionalities. The interface analysis based on the top gate structure has made little progress and lacks a reliable charge trap characterization model suitable for carbon tube devices. Quantitative extraction and analysis of the interface state are crucial for the integration of top-gate devices. Herein, a 5 nm thick Y2O3 thin film was selected as the gate dielectric layer in the top-gate CNTFETs device, and a post-annealing process in air ambience was utilized to optimize the Y2O3-CNT interface. A series of device performance evaluation results indicated that the post-annealing process in air ambience can effectively improve the on-state current and reduce the threshold voltage and subthreshold swing of the device, which are derived from diffusion of oxygen atom in the Y2O3 layer and optimization of the interface of Y2O3-CNT. Specifically, the maximum mobility, subthreshold swing, and threshold voltage are calculated to be 29 cm(2)/V s, 103 mV/dec, and -0.1 V, respectively, and the interface state density is reduced from 2.68 x 10(12) to 1.51 x 10(12) cm(-2) in the gate insulator. These results not only are important to understand the dielectric impact on CNTFET devices but also are useful for future materials' development and device optimization for high-performance CNT-based electronics.
引用
收藏
页数:7
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