A Spatially Distributed Single Photon Avalanche Diode Verilog-A Compact Model

被引:0
|
作者
Rink, Sven [1 ,2 ]
Kammerer, Jean-Baptiste [1 ]
Quenette, Vincent [2 ]
Uhring, Wilfried [1 ]
Gouget, Gilles [2 ]
Manouvrier, Jean-Robert [2 ]
Lallement, Christophe [1 ]
机构
[1] Ctr Natl Rech Sci CNRS, ICube Lab, F-67200 Strasbourg, France
[2] STMicroelectron, F-38920 Crolles, France
关键词
Avalanche breakdown; compact model; experimentally validated model; imaging; industry; 4.0; loop modeling; single photon avalanche diode (SPAD); transient characterization; Verilog-A;
D O I
10.1109/TED.2023.3311423
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Single photon avalanche diodes (SPADs) are crucial for Industry 4.0 advancements, especially in the design of LIght Detection And Ranging (LIDAR) sensors. A compact model is needed to accurately describe their transient behavior. This article presents a lumped model approach that divides the device into different regions. The model accurately emulates the behavior of reach-through SPAD photodiodes by dividing them into high electric field multiplication and low electric field absorption regions. The absorption region can be further subdivided to create multiple possible photon impact points, resulting in precise jitter modeling. This approach enables adaptable and unified SPAD modeling for different avalanche diode architectures. Experimental data confirm the accuracy of the model, and the characterization technique developed highlights the stochastic nature of the device.
引用
收藏
页码:331 / 336
页数:6
相关论文
共 50 条
  • [31] Verilog-A Compact Model of a ME-MTJ Based XNOR/NOR Gate
    Sharma, Nishtha
    Marshall, Andrew
    Bird, Jonathan
    PROCEEDINGS OF THE IEEE/ACM INTERNATIONAL SYMPOSIUM ON NANOSCALE ARCHITECTURES (NANOARCH 2017), 2017, : 162 - 167
  • [32] An Accurate and Verilog-A Compatible Compact Model for Graphene Field-Effect Transistors
    Martin Landauer, Gerhard
    Jimenez, David
    Gonzalez, Jose Luis
    IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2014, 13 (05) : 895 - 904
  • [33] A time-dependent Verilog-A compact model for MOS capacitors with interface traps
    Fukuda, Koichi
    Asai, Hidehiro
    Hattori, Junichi
    Shimizu, Mitsuaki
    Hashizume, Tamotsu
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2019, 58
  • [34] A Monte Carlo Model for Temporal Response and Photon Detection Efficiency of Single Photon Avalanche Diode
    Lu, X.
    Zhang, Y.
    Yang, Y.
    Peng, Q.
    Xu, J.
    Wang, X.
    2019 IEEE NUCLEAR SCIENCE SYMPOSIUM AND MEDICAL IMAGING CONFERENCE (NSS/MIC), 2019,
  • [35] A compact Verilog-A model for Multi-Level-Cell Phase-change RAMs
    Jo, Kwan-Hee
    Bong, Ji-Hye
    Min, Kyeong-Sik
    Kang, Sung-Mo
    IEICE ELECTRONICS EXPRESS, 2009, 6 (19): : 1414 - 1420
  • [36] Verilog-A Compact Model for Oxide-based Resistive Random Access Memory(RRAM)
    Jiang, Zizhen
    Yu, Shimeng
    Wu, Yi
    Engel, Jesse H.
    Guan, Ximeng
    Wong, H. -S. Philip
    2014 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD), 2014, : 41 - 44
  • [37] Optical crosstalk in single photon avalanche diode arrays: a new complete model
    Rech, Ivan
    Ingargiola, Antonino
    Spinelli, Roberto
    Labanca, Ivan
    Marangoni, Stefano
    Ghioni, Massimo
    Cova, Sergio
    OPTICS EXPRESS, 2008, 16 (12) : 8381 - 8394
  • [38] A simple Monte Carlo model for performance optimization of single photon avalanche diode
    Yang, Jian
    Wang, Yang
    Zhou, Wei
    Jin, Xianliang
    Peng, Yan
    Luo, Jun
    PHYSICA SCRIPTA, 2023, 98 (12)
  • [39] Verilog-A Compact Model for a Novel Cu/SiO2/W Quantum Memristor
    Nandakumar, S. R.
    Rajendran, Bipin
    2016 INTERNATIONAL CONFERENCE ON SIMULATION OF SEMICONDUCTOR PROCESSES AND DEVICES (SISPAD), 2016, : 169 - 172
  • [40] Performance of a silicon avalanche diode as a single photon detector
    Liang, Chuang
    Liao, Jing
    Liang, Bing
    Wu, Lingan
    Guangzi Xuebao/Acta Photonica Sinica, 2000, 29 (12): : 1142 - 1147