FPGA-Based high speed two ways parallel histogram computation for grey image

被引：0

作者：

Mahmood, Riyadh Zaghlool ^{[1
]}

Abdullah, Hiba-Aallah Tariq ^{[2
]}

机构：

[1] Univ Mosul, Coll Comp Sci & Math, Software Dept, Mosul, Iraq

[2] Northern Tech Univ, Engn Tech Coll Mosul, Mosul, Iraq

来源：

PRZEGLAD ELEKTROTECHNICZNY | 2023年 / 99卷 / 01期

关键词：

FPGA; Histogram; Parallel; RAM;

D O I：

10.15199/48.2023.01.23

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper approaches to the parallel architecture for local parallel histogram computation is studied. In this method, has been used many number of block RAM in FPGA based, each of them to perform a specific function must use a dual-ported of BRAM memory. These hardware techniques need one array of image and another one array for histogram. To reduce number of cycles in the FPGA implementation of our proposed technique read two operation memories at the same time.

引用

页码：120 / 123

页数：4

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