Formation of high-quality SiO2/GaN interfaces with suppressed Ga-oxide interlayer via sputter deposition of SiO2

被引:4
|
作者
Onishi, Kentaro [1 ]
Kobayashi, Takuma [1 ]
Mizobata, Hidetoshi [1 ]
Nozaki, Mikito [1 ]
Yoshigoe, Akitaka [2 ]
Shimura, Takayoshi [1 ]
Watanabe, Heiji [1 ]
机构
[1] Osaka Univ, Sch Grad Sch Engn, 2-1 Yamadaoka, Suita, Osaka 5650871, Japan
[2] Japan Atom Energy Agcy, 1-1-1 Kouto, Sayo, Hyogo 6795148, Japan
关键词
semiconductor materials; metal-oxide-semiconductor; MOS devices; sputter deposition; annealing; interface properties; interface defects; FIELD; BETA-GA2O3;
D O I
10.35848/1347-4065/acd1ca
中图分类号
O59 [应用物理学];
学科分类号
摘要
While the formation of a GaO x interlayer is key to achieving SiO2/GaN interfaces with low defect density, positive fixed charge is rather easily generated through the reduction of GaO x layer if the annealing conditions are not properly designed. In this study, we minimized the unstable GaO x layer by sputter SiO2 deposition. Negligible GaO x growth was confirmed by synchrotron radiation X-ray photoelectron spectroscopy, even when post-deposition oxygen annealing up to 600 degrees C was performed. A MOS device with negligible capacitance-voltage hysteresis, stable flat-band voltage, and low leakage current was demonstrated by performing oxygen and forming gas annealing at temperatures of 600 degrees C and 400 degrees C, respectively.
引用
收藏
页数:4
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