Hardware-Optimized Reservoir Computing System for Edge Intelligence Applications

被引:12
|
作者
Moran, Alejandro [1 ]
Canals, Vincent [1 ,2 ]
Galan-Prado, Fabio [1 ]
Frasser, Christian F. [1 ]
Radhakrishnan, Dhinakar [3 ]
Safavi, Saeid [3 ]
Rossello, Josep L. [1 ,2 ]
机构
[1] Univ Illes Balears, Palma de Mallorca 07122, Spain
[2] Balearic Isl Hlth Res Inst, Palma de Mallorca 07010, Spain
[3] Endura Technol, Greater San Diego Area, CA USA
关键词
Artificial intelligence; Artificial neural networks; Neuromorphic circuits; Recurrent neural networks;
D O I
10.1007/s12559-020-09798-2
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Edge artificial intelligence or edge intelligence is an ever-growing research area due to the current popularization of the Internet of Things. Unfortunately, incorporation of artificial intelligence (AI) in smart devices operating at the edge is a challenging task due to the power-hungry characteristics of deep learning implementations, such as convolutional neural networks (CNNs). As a feasible alternative, reservoir computing (RC) has attracted a lot of attention in the field of machine learning due to its promising performance in a wide range of applications. In this work, we propose a simple hardware-optimized circuit design of RC systems presenting high energy-efficiency capacities that fulfill the low power requirements of edge intelligence applications. As a proof of concept, we used the proposed design for the implementation of a low-power audio event detection (AED) application in FPGA. The measurements and simulation results obtained show that the proposed approach may provide significant accuracy with the advantage of presenting ultra-low-power characteristics (the energy efficiency estimated is below the microjoule per inference). These results make the proposed system optimal for edge intelligence applications in which energy efficiency and accuracy are the key issues.
引用
收藏
页码:1461 / 1469
页数:9
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