THD Minimization and Reliability Analysis of Cascaded Multilevel Inverter

被引:1
|
作者
Kavitha, R. [1 ]
机构
[1] Kumaraguru Coll Technol, Dept Elect & Elect Engn, Coimbatore, Tamilnadu, India
关键词
Multi-level inverter; PSO; THD; MTTF; reliability; SELECTIVE HARMONIC ELIMINATION; STRATEGIES; TOPOLOGIES; ALGORITHM;
D O I
10.1142/S0218126623501815
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Inverters are DC to AC power converters that are widely used in AC motor drives and distributed energy generation systems. Multi-Level Inverters (MLIs) have emerged as the preferred inverter technology because of their advantages of reduced switching losses and better harmonic profile. This paper deals with the Minimization of Total Harmonic Distortion (MTHD) of Symmetric Cascaded H-bridge Multi-Level Inverter (SCMLI) and Asymmetric Cascaded H-bridge Multi-Level Inverter (ACMLI). A hybrid memetic algorithm composed of heuristic PSO (Particle Swarm Optimization) algorithm and traditional MAS (Mesh Adaptive direct Search) is proposed to optimize the switching angles. In Photo Voltaic (PV) system, the input DC voltage generally varies from its nominal value due to the change in temperature and irradiance. Thus, the sensitivity analysis of THD and harmonics is also carried out considering the variations with non-integer magnitudes of input DC sources. The experimental prototype of SCMLI and ACMLI topology is developed and validated with simulation results. The reliability and Mean Time to Failure (MTTF) of SCMLI and ACMLI are investigated based on power losses of the MOSFET and thermal parameters.
引用
收藏
页数:17
相关论文
共 50 条
  • [41] Improved Performance of Cascaded Multilevel Inverter
    Ali, Asharaf
    Nakka, Jayaram
    2016 INTERNATIONAL CONFERENCE ON MICROELECTRONICS, COMPUTING AND COMMUNICATIONS (MICROCOM), 2016,
  • [42] A novel cascaded multilevel inverter topology
    Chen, A
    Hu, L
    He, XN
    IECON 2004 - 30TH ANNUAL CONFERENCE OF IEEE INDUSTRIAL ELECTRONICS SOCIETY, VOL. 1, 2004, : 796 - 799
  • [43] A Novel Boost Cascaded Multilevel Inverter
    Lee, Sze Sing
    Yang, Yongheng
    Siwakoti, Yam Prasad
    Lee, Kyo-Beum
    IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2021, 68 (09) : 8072 - 8080
  • [44] THD Analysis of Cascaded H-Bridge Multilevel Inverters in Fuel Cell Applications
    Jain, Ankita
    Khatri, Navita
    Shrivastav, Parul
    Mahor, Amita
    2015 INTERNATIONAL CONFERENCE ON COMPUTER, COMMUNICATION AND CONTROL (IC4), 2015,
  • [45] Optimization of the THD and the RMS voltage of a cascaded multilevel power converter
    Pabon Fernandez, Luis David
    Diaz Rodriguez, Jorge Luis
    Caicedo Penaranda, Edison Andres
    2018 IEEE INTERNATIONAL CONFERENCE ON AUTOMATION/XXIII CONGRESS OF THE CHILEAN ASSOCIATION OF AUTOMATIC CONTROL (ICA-ACCA), 2018,
  • [46] Reliability improvement of transistor clamped H-bridge-based cascaded multilevel inverter
    Gautam, Shivam Prakash
    Gupta, Shubhrata
    Kumar, Lalit
    IET POWER ELECTRONICS, 2017, 10 (07) : 770 - 781
  • [47] Comparative analysis of harmonic minimization in a 5 levels cascaded multilevel converter
    Pabon Fernandez, Luis David
    Diaz Rodriguez, Jorge Luis
    Andres Caicedo, Edison
    PROCEEDINGS OF THE 2016 IEEE ANDESCON, 2016,
  • [48] THD Minimization of Modular Multilevel Converter With Unequal DC Values
    Falahi, Ghazal
    Yu, Wensong
    Huang, Alex. Q.
    2014 IEEE ENERGY CONVERSION CONGRESS AND EXPOSITION (ECCE), 2014, : 2153 - 2158
  • [49] Cascaded multilevel inverter using sub-multilevel cells
    Babaei, Ebrahim
    Kangarlu, Mohammad Farhadi
    Sabahi, Mehran
    Pahlavani, Mohammad Reza Alizadeh
    ELECTRIC POWER SYSTEMS RESEARCH, 2013, 96 : 101 - 110
  • [50] Modified GSA for minimisation of THD of voltage source multilevel inverter
    Singh V.
    Gupta S.
    Pattnaik S.
    Singh, Varsha (vsingh.ele@nitrr.ac.in), 1600, Inderscience Enterprises Ltd., 29, route de Pre-Bois, Case Postale 856, CH-1215 Geneva 15, CH-1215, Switzerland (12): : 191 - 212