Coupled Electrical-Thermal-Fluidic Multi-Physics Analysis of Through Silicon Via Pin Fin Microchannel in the Three-Dimensional Integrated Circuit

被引:3
|
作者
Sun, Ping [1 ]
Huang, Bing-Huan [1 ]
Li, Kui [2 ]
Gong, Liang [3 ,4 ]
Zhu, Chuan-Yong [1 ]
Zheng, Ying [5 ]
机构
[1] China Univ Petr East China, Inst New Energy, Qingdao 266580, Shandong, Peoples R China
[2] Xian Microelect Technol Inst, Xian 710065, Shaanxi, Peoples R China
[3] China Univ Petr East China, Inst New Energy, Qingdao 266580, Shandong, Peoples R China
[4] China Univ Petr East China, Dept Energy & Power Engn, Qingdao 266580, Shandong, Peoples R China
[5] Shanghai Tech Inst Elect & Informat, Sch Mech & Energy Engn, Shanghai 201411, Peoples R China
基金
中国国家自然科学基金;
关键词
3D-IC; microchannel cooling; TSV micropin fin; structure optimization; THROUGH-SILICON; HEAT SINK; PERFORMANCE; MANAGEMENT; VIAS;
D O I
10.1115/1.4062531
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
To solve the thermal management problem in the three-dimensional integrated circuit (3D-IC) with high integration and multilayer, this paper establishes a 3D-IC interlayer microchannel model with various embedded TSV micropin fins to explore the temperature distribution of chips and the flow velocity distribution inside the microchannel. The paper selects the sense amplifier and the half adder as the heat source of the memory and processor in the calculation model. The power densities of the sense amplifier and the half adder are 885 kW/m2 and 1.832 MW/m2 combined with the layout size, respectively. Meanwhile, the effects of the shape and arrangement of TSV micropin fins on the flow and heat transfer characteristics are investigated. The result shows that the 1.2:1 diamond micropin fin microchannel with staggered arrangement has the best overall flow and heat transfer performance. Compared with the basic circular micropin fin with the in-line arrangement, the average Nusselt number of this microchannel is improved by 3.20-3.37 times, and the maximum temperature of chips is controlled at 325.92-312.43 K for Re = 628-1819.
引用
收藏
页数:12
相关论文
共 12 条
  • [1] Through-Silicon Via Technology for Three-Dimensional Integrated Circuit Manufacturing
    Civale, Yann
    Redolfi, Augusto
    Jaenen, Patrick
    Kostermans, Maarten
    Van Besien, Els
    Mertens, Sofie
    Witters, Thomas
    Jourdan, Nicolas
    Armini, Silvia
    El-Mekki, Zaid
    Vandersmissen, Kevin
    Philipsen, Harold
    Verdonck, Patrick
    Heylen, Nancy
    Nolmans, Philip
    Li, Yunlong
    Croes, Kristof
    Beyer, Gerald
    Swinnen, Bart
    Beyne, Eric
    2012 35TH IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM (IEMT), 2012,
  • [2] Macroinspection methodology for through silicon via array in three-dimensional integrated circuit
    Fujimori, Yoshihiko
    Tsuto, Takashi
    Tsukamoto, Hiroyuki
    Okamoto, Kazuya
    Suwa, Kyoichi
    JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, 2014, 13 (01):
  • [3] Failure Analysis of the Through Silicon Via in Three-dimensional Integrated Circuit (3D-IC)
    Hossain, Nahid M.
    Kuchukulla, Ritesh Kumar Reddy
    Chowdhury, Masud H.
    2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2018,
  • [4] Co-design of micro-fluidic heat sink and thermal through-silicon-vias for cooling of three-dimensional integrated circuit
    Shi, Bing
    Srivastava, Ankur
    Bar-Cohen, Avram
    IET CIRCUITS DEVICES & SYSTEMS, 2013, 7 (05) : 223 - 231
  • [5] A thermal model for top layer of three-dimensional integrated circuits with through silicon via
    Wang, F. (cicy4@hotmail.com), 1600, Editorial Board of Chinese Journal of Computational (29):
  • [6] Stack-through silicon via dynamic power consumption optimization in three-dimensional integrated circuit
    Dong Gang
    Wu Wen-Shan
    Yang Yin-Tang
    ACTA PHYSICA SINICA, 2015, 64 (02)
  • [7] Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)
    Shen, Wen-Wei
    Chen, Kuan-Neng
    NANOSCALE RESEARCH LETTERS, 2017, 12
  • [8] Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)
    Wen-Wei Shen
    Kuan-Neng Chen
    Nanoscale Research Letters, 2017, 12
  • [9] Thermal management of coaxial through-silicon-via (C-TSV)-based three-dimensional integrated circuit (3D IC)
    Wang, Fengjuan
    Yu, Ningmei
    IEICE ELECTRONICS EXPRESS, 2016, 13 (11):
  • [10] Fabrication and electrical characterization of sub-micron diameter through-silicon via for heterogeneous three-dimensional integrated circuits
    Abbaspour, R.
    Brown, D. K.
    Bakir, M. S.
    JOURNAL OF MICROMECHANICS AND MICROENGINEERING, 2017, 27 (02)