Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)

被引：0
|
作者：
Wen-Wei Shen
Kuan-Neng Chen
机构：
[1] National Chiao Tung University,Department of Electronics Engineering
来源：
Nanoscale Research Letters | 2017年 / 12卷
关键词：
Through-silicon via (TSV); Three-dimensional integrated circuit (3D IC);
D O I：
暂无
中图分类号：
学科分类号：
摘要：
3D integration with through-silicon via (TSV) is a promising candidate to perform system-level integration with smaller package size, higher interconnection density, and better performance. TSV fabrication is the key technology to permit communications between various strata of the 3D integration system. TSV fabrication steps, such as etching, isolation, metallization processes, and related failure modes, as well as other characterizations are discussed in this invited review paper.
引用
收藏
相关论文
共 50 条
  • [1] Three-Dimensional Integrated Circuit (3D IC) Key Technology: Through-Silicon Via (TSV)
    Shen, Wen-Wei
    Chen, Kuan-Neng
    [J]. NANOSCALE RESEARCH LETTERS, 2017, 12
  • [2] Through-Silicon Via Technology for Three-Dimensional Integrated Circuit Manufacturing
    Civale, Yann
    Redolfi, Augusto
    Jaenen, Patrick
    Kostermans, Maarten
    Van Besien, Els
    Mertens, Sofie
    Witters, Thomas
    Jourdan, Nicolas
    Armini, Silvia
    El-Mekki, Zaid
    Vandersmissen, Kevin
    Philipsen, Harold
    Verdonck, Patrick
    Heylen, Nancy
    Nolmans, Philip
    Li, Yunlong
    Croes, Kristof
    Beyer, Gerald
    Swinnen, Bart
    Beyne, Eric
    [J]. 2012 35TH IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM (IEMT), 2012,
  • [3] Thermal management of coaxial through-silicon-via (C-TSV)-based three-dimensional integrated circuit (3D IC)
    Wang, Fengjuan
    Yu, Ningmei
    [J]. IEICE ELECTRONICS EXPRESS, 2016, 13 (11):
  • [4] Failure Analysis of the Through Silicon Via in Three-dimensional Integrated Circuit (3D-IC)
    Hossain, Nahid M.
    Kuchukulla, Ritesh Kumar Reddy
    Chowdhury, Masud H.
    [J]. 2018 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2018,
  • [5] Electrical Testing of Blind Through-Silicon Via (TSV) for 3D IC Integration
    Hung, Jui-Feng
    Lau, John H.
    Chen, Peng-Shu
    Wu, Shih-Hsien
    Lai, Shinn-Juh
    Li, Ming-Lin
    Sheu, Shyh-Shyuan
    Tzeng, Pei-Jer
    Lin, Zhe-Hui
    Ku, Tzu-Kun
    Lo, Wei-Chung
    Kao, Ming-Jer
    [J]. 2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 564 - 570
  • [6] Tungsten through-silicon via technology for three-dimensional LSIs
    Kikuchi, Hirokazu
    Yamada, Yusuke
    Ali, Atif Mossad
    Liang, Jun
    Fukushima, Takafumi
    Tanaka, Tetsu
    Koyanagi, Mitsumasa
    [J]. JAPANESE JOURNAL OF APPLIED PHYSICS, 2008, 47 (04) : 2801 - 2806
  • [7] Overview and outlook of through-silicon via (TSV) and 3D integrations
    Lau, John H.
    [J]. MICROELECTRONICS INTERNATIONAL, 2011, 28 (02) : 8 - 22
  • [8] Through-Silicon Via Technology for 3D Applications
    Philipsen, Harold G. G.
    Luehn, Ole
    Civale, Yann
    Wang, Yu-Shuen
    Tezcan, Deniz Sabuncuoglu
    Ruythooren, Wouter
    [J]. PROCESSING, MATERIALS, AND INTEGRATION OF DAMASCENE AND 3D INTERCONNECTS, 2010, 25 (38): : 97 - 107
  • [9] Dielectric Quality of 3D Capacitor Embedded in Through-Silicon Via (TSV)
    Lin, Ye
    Tan, Chuan Seng
    [J]. 2018 IEEE 68TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2018), 2018, : 1158 - 1163
  • [10] Shielding Structures for Through Silicon Via (TSV) to Active Circuit Noise Coupling in 3D IC
    Lim, Jaemin
    Lee, Manho
    Jung, Daniel H.
    Kim, Jonghoon J.
    Choi, Sumin
    Lee, Hyunsuk
    Kim, Joungho
    [J]. 2015 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits, 2015, : 248 - 251
12345