Computational Efficiency of Circuit Design and Optimization Algorithms: A Comparative Study

被引:2
|
作者
Adair, Alec [1 ]
Tajalli, Armin [1 ]
机构
[1] Univ Utah, Dept Elect & Comp Engn, Salt Lake City, UT 84112 USA
来源
2023 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS | 2023年
关键词
g(m)/I-D methodology; Inverse-ID methodology; C/I-D methodology; Inversion-Coefficient methodology; circuit design methodology; FET circuits; computational complexity;
D O I
10.1109/ISCAS46773.2023.10182084
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Design of analog circuits is a computationally-complex process. Therefore, robust, simple, and efficient algorithms are required for design automation purpose. Developing generalized analog design methodologies, valid across a large solution space, is very demanding. This article compares computational complexity and precision of three different design methodologies, i.e., g(m)/I-D, Inversion Coefficient, IC, and C/I-D, or Inverse-ID approaches. The three methodologies will be analyzed to explore their performance to meet basic needs of the circuit design industry. A basic analog circuit block, i.e., a common-source amplifier, has been selected for this analysis. This study shows that the C/I-D method requires the least approximation for optimization.
引用
收藏
页数:5
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