An Improved Single-Event Effect Performance SiC MOSFET of Hole Extraction Pillar Combined With Multilayer P-Shield Structure

A planar gate SiC MOSFET of hole extraction pillar combined with multilayer P-shield structure (HEMP-MOS) is proposed and characterized to improve single-event burnout (SEB) and single-event gate rupture (SEGR). The multiple P-shield layers are utilized to reduce the peak heat power caused by the strong electric field and high current at P-base/drift junction. Therefore, the maximum lattice temperature (hot spot) in HEMP-MOS is limited because of lower heat powers and larger areas of energy dissipation. The SEB threshold voltage of 850 V can be achieved with a linear energy transfer (LET) value of 77.9 MeV.cm(2)/mg for HEMP-MOS, which corresponds to an increase of 610 V for conventional SiC MOSFET and 140 V for SiC MOSFET with multilayer buffer. Moreover, when heavy ions strike near the center of the device, the hole extraction pillar provides an additional path to extract accumulated holes below the gate oxide induced by heavy ions, thus ameliorating electric field crowding in gate oxide and improving the SEGR performance. When heavy ions with an LET value of 77.9 MeV.cm(2)/mg strike the center of the device and the drain voltage is 50% rated voltage (V-DS = 600 V), the maximum gate oxide electric field in HEMP-MOS is as low as 2.3 MV/cm, which is one 27th of that in SiC MOSFET with multilayer buffer. These results show that HEMP-MOS provides a single-event effect (SEE) hardening structure for SiC MOSFET in aerospace applications.