共 50 条
- [1] Cryo-CMOS for Analog/Mixed-Signal Circuits and Systems [J]. 2020 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2020,
- [2] gm/ID Based Noise Analysis for CMOS Analog Circuits [J]. 2011 IEEE 54TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS), 2011,
- [4] Cryo-CMOS Circuits and Systems for Scalable Quantum Computing [J]. 2017 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC), 2017, : 264 - 264
- [5] Design of Low-power Analog Circuits in Advanced Technology Nodes using the Gm/ID Approach [J]. 2023 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS, 2023,
- [6] Design and Verification of Analog CMOS Circuits Using the gm/ID-Method with Age-Dependent Degradation Effects [J]. PROCEEDINGS OF 2016 26TH INTERNATIONAL WORKSHOP ON POWER AND TIMING MODELING, OPTIMIZATION AND SIMULATION (PATMOS), 2016, : 136 - +
- [7] A tool for automatic design of analog circuits based on gm/ID methodology [J]. 2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2006, : 4643 - +
- [8] Design of CMOS Instrumentation Amplifier Using gm/ID Methodology [J]. 2014 INTERNATIONAL CONFERENCE ON CIRCUITS, COMMUNICATION, CONTROL AND COMPUTING (I4C), 2014, : 29 - 32
- [9] CMOS amplifier design using simplified gm/ID technique [J]. Adv. Intell. Sys. Comput., (537-544):