A Megawatt-Scale Si/SiC Hybrid Multilevel Inverter for Electric Aircraft Propulsion Applications

被引:15
|
作者
Diao, Fei [1 ,2 ]
Du, Xinyuan [1 ]
Ma, Zhuxuan [1 ]
Wu, Yuheng [1 ,2 ]
Guo, Feng [1 ]
Li, Yufei [1 ,3 ,4 ]
Zhao, Zhe [1 ]
Zhao, Yue [1 ]
机构
[1] Univ Arkansas, PESLA, Fayetteville, AR 72701 USA
[2] John Deere Intelligent Solut Grp, Cary, NC 27513 USA
[3] Princeton Univ, Dept Elect & Comp Engn, Princeton, NJ 08540 USA
[4] Princeton Univ, Andlinger Ctr Energy & Environm, Princeton, NJ 08540 USA
基金
美国国家科学基金会;
关键词
Electric propulsion; medium voltage (MV); multilevel inverter; silicon carbide (SiC) MOSFETs; MODEL-PREDICTIVE CONTROL; CLAMPED CONVERTER; CHALLENGES; STRATEGY;
D O I
10.1109/JESTPE.2023.3266197
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article presents the design and development of a megawatt-scale medium-voltage (MV) hybrid inverter prototype to validate its feasibility and potentials for electric propulsion on the next-generation electric aircraft system with an onboard MV dc distribution, e.g., 3-kV dc bus in this work. The proposed hybrid converter consists of a three-level active-neutral-point-clamped (ANPC) stage using 3.3-kV silicon insulated-gate bipolar transistors (IGBTs) cascaded with an H-bridge stage using cost-effective 1.2-kV silicon carbide (SiC) MOSFETs in each phase. Comprehensive design and evaluation of the full-scale prototype are elaborated, including the low-inductance busbar design, converter architecture optimization, and system integration. In addition, a low computational cost space vector modulation with common-mode voltage (CMV) reduction feature is proposed to fully exploit the benefits of SiC MOSFET in this hybrid topology. Extensive simulation and experimental results are provided to demonstrate the performance of each power stage and the full converter assembly in both the steady-state operation and variable frequency operations. Compared with the widely adopted IGBT-based ANPC converter in MV applications, the proposed seven-level (7-L) hybrid inverter system features higher power efficiency, reduced harmonics, higher dc voltage utilization, reduced CMV, and lower dv / dt while remaining cost effective compared to the solution using MV SiC MOSFETs.
引用
收藏
页码:4095 / 4107
页数:13
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