Optimizing U-Shape FinFETs for Sub-5nm Technology: Performance Analysis and Device-to-Circuit Evaluation in Digital and Analog/Radio Frequency Applications

被引:12
|
作者
Ramakrishna, K. V. [1 ]
Valasa, Sresta [1 ]
Bhukya, Sunitha [1 ]
Vadthiya, Narendar [1 ]
机构
[1] Natl Inst Technol, Dept Elect & Commun Engn, Warangal 506004, India
关键词
junctionless; FinFET; structural variations; u-shape; analog/RF; common source amplifier; FRINGING FIELDS; GATE; OPTIMIZATION; PLANAR; MODEL;
D O I
10.1149/2162-8777/acf5a2
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
FinFET is considered as the potential contender in the era of Multigate FETs. This manuscript for the first time presents the structural variations for Junctionless FinFET devices at IRDS sub-5nm technology node. Four JL-FinFET novel structures are proposed here namely Junctionless Middlegate-U shape FinFET (JL-MG-U-FinFET), Junctionless U shaped FinFET (JL-U-FinFET), Junctionless Inverted-U shaped FinFET (JL-Inv-U-FinFET), and Junctionless Double gate- Inverted-U shaped FinFET (JL-DG-Inv-U-FinFET). The electrical and analog/RF performances of these structures are compared and it is found that JL-DG-Inv-U-FinFET gives better performance in terms of minimizing short channel effects as well as in terms of analog/RF characteristics. The ION/IOFF ratio values for (JL-MG-U-FinFET, JL-U-FinFET, JL-Inv-U-FinFET, and JL-DG-Inv-U-FinFET) are observed as 8.5 x 106, 1.2 x 109, 2.04 x 108, and 1.1 x 1010, respectively. Similarly, the SS values are noted as 93.44 mV dec-1, 70.87 mV dec-1, 70.61 mV dec-1, and 62.1 mV dec-1 for the respective configurations. Furthermore, the effect of variation in geometrical parameters such as gate length (Lg), U-shaped fin width (WU-fin), and U-shaped fin height (HU-fin) on DC and analog/RF characteristics is also explored. It has been observed that the DC parameters such as Ion/Ioff ratio, SS are better for higher Lg, lower WU-fin, and higher HU-fin. Moreover, the JL-DG-Inv-U-FinFET based Common Source (CS) amplifier produced a gain of 5.2. The results reported in this study will aid device engineers in selecting better geometrical parameters to achieve improved JL-DG-Inv-U-FinFET performance.
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页数:12
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