共 50 条
- [1] 3DIC integration with D2D bump-less Cu bonding 2023 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE, 3DIC, 2023,
- [2] Fabrication and Characterization of Bump-less Cu-Cu Bonding By Wafer-On-Wafer Stacking For 3D IC 2010 12TH ELECTRONICS PACKAGING TECHNOLOGY CONFERENCE (EPTC), 2010, : 787 - 790
- [3] Low Temperature Bump-less Cu-Cu Bonding Enhancement with Self Assembled Monolayer (SAM) Passivation for 3-D Integration 2010 PROCEEDINGS 60TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2010, : 1364 - 1369
- [4] Metal-Alloy Cu Surface Passivation Leads to High Quality Fine-Pitch Bump-Less Cu-Cu Bonding for 3D IC and Heterogeneous Integration Applications 2018 IEEE 68TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC 2018), 2018, : 1561 - 1566
- [6] Signal Integrity Design of Bump-less Interconnection for High-speed Signaling in 2.5D and 3D IC 2015 ASIA-PACIFIC INTERNATIONAL SYMPOSIUM ON ELECTROMAGNETIC COMPATIBILITY (APEMC), 2015, : 352 - 355
- [7] Low Temperature Cu/In Bonding for 3D Integration 2017 5TH INTERNATIONAL WORKSHOP ON LOW TEMPERATURE BONDING FOR 3D INTEGRATION (LTB-3D), 2017, : 17 - 17
- [8] 3D stacking using bump-less process for sub 10um pitch interconnects 2016 IEEE 66TH ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2016, : 128 - 133
- [9] High Reliability Insert-Bump Bonding Process for 3D Integration 2013 IEEE INTERNATIONAL 3D SYSTEMS INTEGRATION CONFERENCE (3DIC), 2013,
- [10] Development of Cost-effective Wafer Level Process for 3D-Integration with Bump-less TSV Interconnects 2012 IEEE 62ND ELECTRONIC COMPONENTS AND TECHNOLOGY CONFERENCE (ECTC), 2012, : 537 - 540