A Novel Analytical Formulation of SiC-MOSFET Losses to Size High-Efficiency Three-Phase Inverters

This paper presents a novel analytical loss formulation to predict the efficiency of three-phase inverters using silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs). The proposed analytical formulation accounts for the influence of the output current harmonic distortion on the conduction losses as well as the impact of the output parasitic capacitances and the deadtime on the switching losses. The losses are formulated in balanced conditions to select suitable SiC MOFETs for the desired target efficiency. To validate the proposed methodology, a 3-phase inverter is designed to present full load efficiency in excess of 99% when built using SiC MOSFETs antiparalleled with SiC Schottky diodes selected for the specified full load efficiency. Experimental assessment of the designed inverter efficiency is compared with the expected values from the proposed analytical formulation and shown to match or exceed the predicted results for loads ranging from 40% to 100% of full load.