gemV-tool: A Comprehensive Soft Error Reliability Estimation Tool for Design Space Exploration

被引:0
|
作者
So, Hwisoo [1 ]
Ko, Yohan [2 ]
Jung, Jinhyo [1 ]
Lee, Kyoungwoo [1 ]
Shrivastava, Aviral [3 ]
机构
[1] Yonsei Univ, Dept Comp Sci, 50 Yonsei Ro, Seoul 03722, South Korea
[2] Yonsei Univ, Div Software, 1 Yonseidae Gil, Wonju 26493, South Korea
[3] Arizona State Univ, Sch Comp Informat & Decis Syst Engn, 660 S Mill Ave, Tempe, AZ 85281 USA
基金
新加坡国家研究基金会;
关键词
soft error; transient fault; fault tolerance; embedded systems; protection technique; MODEL;
D O I
10.3390/electronics12224573
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
With aggressive technology scaling, soft errors have become a major threat in modern computing systems. Several techniques have been proposed in the literature and implemented in actual devices as countermeasures to this problem. However, their effectiveness in ensuring error-free computing cannot be ascertained without an accurate reliability estimation methodology. This can be achieved by using the vulnerability metric: the probability of system failure as a function of the time the program data are exposed to transient faults. In this work, we present a gemV-tool, a comprehensive toolset for estimating system vulnerability, based on the cycle-accurate gem5 simulator. The three main characteristics of the gemV-tool are: (i) fine-grained modeling: vulnerability modeling at a fine-grained granularity through the use of RTL abstraction; (ii) accurate modeling: accurate vulnerability calculation of speculatively executed instructions; and (iii) comprehensive modeling: vulnerability estimation of all the sequential elements in the out-of-order processor core. We validated our vulnerability models through extensive fault injection campaigns with <3% correlation error and 90% statistical confidence. Using the gemV-tool, we made the following observations: (i) the vulnerability of two microarchitectural configurations with similar performance can differ by 82%; (ii) the vulnerability of a processor can vary by more than 10x, depending on the implemented algorithm; and (iii) the vulnerability of each component in the processor varies significantly, depending on the ISA of the processor.
引用
收藏
页数:20
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