FPGA implementation of carrier-based PWM techniques for single-phase matrix converters

Field programmable gate arrays (FPGAs) stand out as a highly efficient and reliable digital solution to control power electronics converters. Direct single-to-single-phase matrix converters (SSMCs) are widely used in industrial and power system-related applications and are usually controlled using carrier-based PWM techniques. Existing literature studies on FPGA implementation of carrier-based PWM techniques for SSMC lack providing architectural design details and programming algorithms. Further, resource utilization/power consumption optimizations and analyses are not performed. To fill these research gaps, we propose a new FPGA-based design that is capable of employing the desired carrier-based PWM technique and synthesizing any output frequency. It also optimizes the FPGA resource utilization and power consumption and utilizes a novel approach to synchronize the generated triggering pulses with the source. A laboratory setup is built to experimentally test the proposed FPGA-based design, where results demonstrate the efficiency and reliability of the design.