Low-power and high-speed HfLaO-based FE-TFTs for artificial synapse and reconfigurable logic applications

Emulating the human nervous system to build next-generation computing architectures is considered a promising way to solve the von Neumann bottleneck. Transistors based on ferroelectric layers are strong contenders for the basic unit of artificial neural systems due to their advantages of high speed and low power consumption. In this work, the potential of Fe-TFTs integrating the HfLaO ferroelectric film and ultra-thin ITO channel for artificial synaptic devices is demonstrated for the first time. The Fe-TFTs can respond significantly to pulses as low as 14 ns with an energy consumption of 93.1 aJ, which is at the leading level for similar devices. In addition, Fe-TFTs exhibit essential synaptic functions and achieve a recognition rate of 93.2% for handwritten digits. Notably, a novel reconfigurable approach involving the combination of two types of electrical pulses to realize Boolean logic operations ("AND", "OR") within a single Fe-TFT has been introduced for the first time. The simulations of array-level operations further demonstrated the potential for parallel computing. These multifunctional Fe-TFTs reveal new hardware options for neuromorphic computing chips. Fe-TFTs have fast operating speed (14 ns) and low power consumption (93.1 aJ). Basic synaptic functionality can be achieved by applying either gate or source pulses. Fe-TFTs demonstrates digits recognition and reconfigurable Boolean logic operations.