Attainment of nearly thermally limited subthreshold slope in GaAs MOSFETs with in-situ Y2O3 gate dielectric for cryogenic electronics

被引:0
|
作者
Young, L. B. [1 ,2 ]
Liu, J. [3 ]
Lin, Y. -H. G. [1 ,2 ]
Wan, H. -W. [1 ,2 ]
Cheng, Y. -T. [1 ,2 ]
Kwo, J. [4 ]
Hong, M. [1 ,2 ,3 ]
机构
[1] Natl Taiwan Univ, Grad Inst Appl Phys, Taipei 10617, Taiwan
[2] Natl Taiwan Univ, Dept Phys, Taipei 10617, Taiwan
[3] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 10617, Taiwan
[4] Natl Tsing Hua Univ, Dept Phys, Hsinchu 30013, Taiwan
关键词
D O I
10.1109/VLSI-TSA/VLSI-DAT57221.2023.10134031
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We have achieved subthreshold slope (SS) values close to the thermal limited values in GaAs metal-oxide-semiconductor field-effect transistors (MOSFETs). The low interfacial trap density (D-it) at the in-situ prepared Y2O3/GaAs(001) has attributed to these low SS values of 63 mV/dec at 300 K and 18 mV/dec at 77 K, respectively. The SS value of our GaAs MOSFETs at 77 K is comparable to those of the SiO2/Si MOSFETs at 77 K and InGaAs high-electron-mobility transistors (HEMTs) at 5K, suggesting the GaAs MOSFETs for cryogenic low-power application.
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