Digital Linearization of Wideband Envelope Tracking Power Amplifiers for Mobile Terminals

被引:6
|
作者
Li, Wantao [1 ]
Montoro, Gabriel [1 ]
Gilabert, Pere L. [1 ]
机构
[1] Univ Politecn Catalunya UPC Barcelona Tech, Dept Signal Theory & Commun, Barcelona 08860, Spain
关键词
Bandwidth; Radio frequency; Linearity; Modulation; Wideband; Nonlinear distortion; Behavioral sciences; Digital predistortion (DPD); envelope tracking (ET); power amplifier (PA); radio frequency (RF) leakage; PREDISTORTION;
D O I
10.1109/TMTT.2022.3196691
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This article presents a low-complexity linearization method to compensate for multisource nonlinear distortion in wideband envelope tracking (ET) power amplifiers (PAs) for 5G new radio (NR) mobile terminals. The proposed linearization approach consists in an envelope leakage cancellation (ELC) system operating in the dynamic supply path and a 2-D digital predistortion (2-D-DPD) linearizer acting on the baseband complex modulated signal. In a first step, an envelope generalized memory polynomial (EGMP) behavioral model is proposed to compensate for the unwanted radio frequency (RF) leakage that appears at the output of ET modulator (ETM). Then, a baseband 2-D-DPD linearizer based on a slow envelope-dependent generalized memory polynomial (SED-GMP) behavioral model is used to further enhance the linearization performance. The proposed method is validated on a system-on-chip (SoC) ET PA board for mobile applications. The reported experimental results show how the proposed digital linearization approach can mitigate the linearity and efficiency trade-off in ET PAs. Consequently, the out-of-band linearity requirement of - 36 dBc of adjacent channel power ratio (ACPR) is met for 5G-NR test signals with bandwidths ranging from 60 to 200 MHz at 2.55 GHz (band B41), with an overall ET PA power efficiency ranging from 10.1 % and up to 16.5 %, depending on the signal bandwidth.
引用
收藏
页码:48 / 58
页数:11
相关论文
共 50 条
  • [21] Memory models for behavioral modeling and digital predistortion of envelope tracking power amplifiers
    Tafuri, Felice Francesco
    Sira, Daniel
    Nielsen, Troels Studsgaard
    Jensen, Ole Kiel
    Mikkelsen, Jan Hvolgaard
    Larsen, Torben
    MICROPROCESSORS AND MICROSYSTEMS, 2015, 39 (08) : 879 - 888
  • [22] A digital predistortion assisted hybrid supply modulator for envelope tracking power amplifiers
    Salimi, Atefeh
    Dehghani, Rasoul
    Nabavi, Abdolreza
    INTEGRATION-THE VLSI JOURNAL, 2016, 52 : 282 - 290
  • [23] A digital predistorter with adaptive architecture for high efficient envelope tracking power amplifiers
    Yuan, Jiangnan
    Feng, Chenwei
    International Journal of Circuits, Systems and Signal Processing, 2016, 10 : 354 - 360
  • [24] Design of a memory polynomial predistorter for wideband envelope tracking amplifiers
    Zhang, Jing
    He, Songbai
    Gan, Lu
    JOURNAL OF SYSTEMS ENGINEERING AND ELECTRONICS, 2011, 22 (02) : 193 - 199
  • [26] A new envelope predistortion linearization architecture for handset power amplifiers
    Woo, WM
    Kenney, JS
    RAWCON: 2004 IEEE RADIO AND WIRELESS CONFERENCE, PROCEEDINGS, 2004, : 175 - 178
  • [27] Derivative-Based Envelope Design Technique for Wideband Envelope Tracking Power Amplifier with Digital Predistortion
    YI Xueya
    CHEN Jixin
    CHEN Peng
    NING Dongfang
    YU Chao
    ZTE Communications, 2022, 20(S1) (S1) : 22 - 26
  • [28] Novel Digital Compensation Approaches for Envelope Tracking Amplifiers
    Hekkala, Atso
    Kotelba, Adrian
    Lasanen, Mika
    Jarvensivu, Pertti
    Mammela, Aarne
    WIRELESS PERSONAL COMMUNICATIONS, 2012, 62 (01) : 55 - 77
  • [29] Novel Digital Compensation Approaches for Envelope Tracking Amplifiers
    Atso Hekkala
    Adrian Kotelba
    Mika Lasanen
    Pertti Järvensivu
    Aarne Mämmelä
    Wireless Personal Communications, 2012, 62 : 55 - 77
  • [30] Envelope tracking power amplifier with static predistortion linearization
    Harju, Henri
    Rautio, Timo
    Hietakangas, Simo
    Rahkonen, Timo
    2007 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1-3, 2007, : 388 - +