New Modified 4:2 Approximate Compressors for Low-power Applications

Energy efficiency is an important design concern in most digital and embedded systems. In particular, hardware projects often require high-speed and low-power multipliers. Compressors usually implement the partial products reduction of a multiplier to reduce the critical path and the power consumption. An emerging approach that can be applied in error-tolerant applications to improve the overall performance is the approximate computing. In this paper, two power-efficient 4:2 approximate compressors are proposed and evaluated at the transistor level in a 7 nm FinFET technology. The proposed circuits show improvements in power and delay compared to state-of-the-art approximate compressors, reducing the PDP on average by 66.7% and 79.1%, respectively. Furthermore, operating at near-threshold voltage, the energy efficiency can be improved by 43% and 52% compared to nominal operation.