Role of the electrolyte layer in CMOS-compatible and oxide-based vertical three-terminal ECRAM

被引:6
|
作者
Han, Geonhui [1 ]
Seo, Jongseon [1 ]
Kim, Hyejin [1 ]
Lee, Deaseok [1 ]
机构
[1] Dept Elect Mat Engn, 20 Kwangwoon, Seoul 01897, South Korea
关键词
DEPOSITION CONDITIONS; SYNAPSE; MEMORY; DEVICE;
D O I
10.1039/d2tc05552j
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
Structured three-terminal electrochemical random access memory (3T-ECRAM) is developed as a synaptic device at wafer scale using CMOS fabrication-compatible processes and materials to demonstrate the feasibility of mass production. In addition, a 3T-ECRAM is fabricated as a 3D vertical structure at nano scale for high-density integration. The role of the electrolyte layer is demonstrated based on comparisons with various device structures and the obtained results verify that a 3T-ECRAM is significantly more reliable after inserting an electrolyte layer. Moreover, the operation mechanism is analyzed, clearly indicating that an electrolyte layer decreases the diffusion coefficient and ion concentration. Thus, the relaxation of attracted oxygen ions is preventable, resulting in improved reliability. The results achieved in this research not only demonstrate the feasibility of mass producing ECRAMs but also provide insights into improving their synaptic characteristics.
引用
收藏
页码:5167 / 5173
页数:7
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