Efficient ILT via Multi-level Lithography Simulation

被引:0
|
作者
Sun, Shuyuan [1 ,2 ]
Yang, Fan [1 ,2 ]
Yu, Bei [4 ]
Shang, Li [1 ,3 ]
Zeng, Xuan [1 ,2 ]
机构
[1] Fudan Univ, State Key Lab Integrated Chips & Syst, Shanghai, Peoples R China
[2] Fudan Univ, Sch Microelect, Shanghai, Peoples R China
[3] Fudan Univ, Shanghai Key Lab Data Sci, Sch Comp Sci, Shanghai, Peoples R China
[4] Chinese Univ Hong Kong, Hong Kong, Peoples R China
基金
中国国家自然科学基金; 国家重点研发计划;
关键词
D O I
10.1109/DAC56929.2023.10247704
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Inverse Lithography Technology (ILT) is a widely investigated method to improve the yield of chip manufacturing. However, high computational complexity and difficulty in fabricating curvilinear shapes have hindered the widespread adoption of ILT. This paper presents an efficient ILT framework, including a multi-level resolution method for simulation acceleration, a downsampling strategy for mask optimization, and an improved mask binary function to improve mask printability. Experimental results show that the proposed method outperforms state-of-the-art methods with at least a 33.8% reduction in L2 loss and a 15.5% reduction in PVBand.
引用
收藏
页数:6
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