Multi-Core ARM-Based Hardware-Accelerated Computation for Spiking Neural Networks

被引:4
|
作者
Wei, Xile [1 ]
Xu, Jinda [1 ]
Gong, Bo [1 ]
Chang, Siyuan [1 ]
Lu, Meili [2 ]
Zhang, Zhen [1 ]
Yi, Guosheng [1 ]
Wang, Jiang [1 ]
机构
[1] Tianjin Univ, Sch Elect & Informat Engn, Tianjin Key Lab Proc Measurement & Control, Tianjin 300072, Peoples R China
[2] Tianjin Univ Technol & Educ, Sch Informat Technol Engn, Tianjin 300222, Peoples R China
基金
中国国家自然科学基金;
关键词
Advanced RISC machines (ARM) architecture; multicore processing; neural network hardware; real-time system; REAL-TIME SIMULATION; BASAL GANGLIA; MODEL; IMPLEMENTATION; PLATFORM; NEURONS;
D O I
10.1109/TII.2022.3216011
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Distributed edge computing platforms are of great significance for the implementation of brain-like computing research. Due to the limited power consumption and real-time requirements, hardware acceleration of computing units is a challenging task. Taking advantage of both scalable hardware framework and lower cost, this article designs a multicore distributed computing platform for spiking neural networks. Particularly, a shared memory partition structure is utilized to participate in hardware acceleration. Through the spike-queue-based synaptic mapping mechanism, each parallel computing unit deals with efficient point-to-point connections. In addition, this platform provides a basic community unit (BCU) that encapsulates a standard neuron model library and rich peripheral interfaces. With the support of GUI, users can quickly build large-scale systems. The experimental results show that a single BCU can accommodate more than 10 000 neurons updated in real-time at a power consumption of 273.6 mW. The extended BCU group is able to perform network dynamic simulations in the basal ganglia-thalamus plausible biological network composed of Hodgkin-Huxley neurons as well as MNIST dataset classification in the leaky-integrate-fire network. The outstanding flexibility and real-time performance of the proposed hardware architecture provide great potential for embedded applications of neural computation.
引用
收藏
页码:8007 / 8017
页数:11
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