Design and implementation of high-performance 20-T hybrid full adder circuit

被引:0
|
作者
Kandpal, Jyoti [1 ]
Tomar, Abhishek [2 ]
机构
[1] Graphic Era Hill Univ, Dehra Dun, India
[2] Govind Ballabh Pant Univ Agr & Technol, Pantnagar, India
关键词
TCAD; XOR-XNOR; CMOS; 3D; CPL; FA; LOW-POWER; XOR;
D O I
10.1007/s10470-023-02219-y
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
A new high-performance exclusive OR/exclusive NOR (XOR/XNOR) architecture with ten transistors is proposed in this work. Our research focused on implementing a hybrid exclusive OR/exclusive NOR circuit to achieve high performance, good driving capability, and low energy operation for deep sub-micrometer applications. Afterwards, a full adder (FA) circuit is implemented using the proposed exclusive OR/exclusive NOR design. All circuits are examined and simulated using Generic Process Design Kit 90 nm CMOS technology and a cadence spectra simulator. In terms of power delay product (PDP), the simulation results indicate that the proposed exclusive OR/exclusive NOR and FA design is more efficient than the existing circuits. In addition, the proposed exclusive OR/exclusive NOR and FA are implemented at the device level with Visual TCAD (Technology Computer-Aided Design) software, and the performance is tested using the Genius simulator.
引用
收藏
页码:97 / 110
页数:14
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