EMI Mitigation for SiC MOSFET Power Modules Using Integrated Common-Mode Screen

被引:1
|
作者
Moaz, Taha [1 ]
Rajagopal, Narayanan [1 ]
Dimarino, Christina [1 ]
Fish, Michael [2 ]
机构
[1] Virginia Polytech Inst & State Univ, Bradley Dept Elect & Comp Engn, Arlington, VA 22203 USA
[2] US Army DEVCOM, Army Res Lab, Adelphi, MD 20783 USA
关键词
Electromagnetic interference; Switches; Multichip modules; Silicon carbide; Layout; MOSFET; Capacitance; Conducted electromagnetic interference; electromagnetic interference; semiconductor packaging; silicon carbide (SiC); wide band gap power semiconductor devices; CONDUCTED EMI; NOISE-REDUCTION; CONVERTER; JFET;
D O I
10.1109/OJPEL.2023.3324599
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Electromagnetic interference (EMI) remains a critical roadblock to fully benefitting from the various advantages provided by wide-bandgap devices. Of particular concern is the common-mode (CM) emissions generated during the device operation. This work aims to inform EMI mitigation strategies that can be implemented at the power module design stage and that can result in modules with lower noise emissions in the conducted EMI frequency range. Four 1.2 kV SiC MOSFET power modules are fabricated with different architectures found from literature to better understand their impact on EMI mitigation and to identify trade-offs. Module architectures with integrated CM screens connected to two different DC nodes are experimentally tested and an in-depth analysis on the EMI results is presented. Experimental results show that using a CM screen connected to the DC-link midpoint allows for up to 26 dB of CM current reduction at the baseplate of the module and the input of the converter. Furthermore, this integrated CM screen configuration enables a 0.5% increase in efficiency.
引用
收藏
页码:873 / 886
页数:14
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