A novel second generation current conveyor (CCII)-based high frequency memristor model

In this research article, we propose a combination of the second-generation current conveyor (CCII) and a PMOS circuit, emulating a memristive behavior. The voltage across the capacitor controls the conductivity of the PMOS, thus creating a non-linear conductance, also known as memductance. The maximum operating frequency is 40 MHz, the transistor count is 10 and the total power consumption of the circuit is 2.6 mW. A reduction in the transistor count by almost 40% has been achieved with this emulator circuit. When compared with the design that uses CCII the drop in the transistor count is even more i.e, by 58% approx. The proposed design has been laid using the cadence environment 180 nm process parameter and the layout occupies an area of 619.25 mu m2. The theoretical analyses and simulations have been experimentally verified using CD-4007 CMOS integrated circuit (IC). Besides, a read-write operation using the proposed emulator has been included briefly. Furthermore, the current mode circuits owing to their various advantages such as less power consumption and smaller chip area pave the path for fabrication using standard CMOS technologies.