Performance comparison of integrated optical switching delay lines on three typical photonic integration pilot lines

被引：11

作者：

Shi, Shangqing ^{[1
]}

Hu, Guohua ^{[1
]}

Lin, Dongdong ^{[1
]}

Zhang, Jingyu ^{[1
]}

Liu, Pengcheng ^{[1
]}

Lu, Mengjia ^{[1
]}

Cheng, Wei ^{[1
]}

Lin, Tong ^{[1
]}

Yun, Binfeng ^{[1
]}

Cui, Yiping ^{[1
]}

机构：

[1] Southeast Univ, Adv Photon Ctr, Nanjing 210096, Peoples R China

来源：

OPTICS AND LASER TECHNOLOGY | 2023年 / 159卷

基金：

中国国家自然科学基金;

关键词：

Photonic integrated circuits; Optical switching delay line; Performance comparison; Silicon-on-insulator; Silicon nitride; MODULATOR; NETWORK; BUFFERS;

D O I：

10.1016/j.optlastec.2022.109016

中图分类号：

O43 [光学];

学科分类号：

070207 ; 0803 ;

摘要：

Integrated optical switching delay line (OSDL) chip, which is composed of optical switches cascaded with optical waveguides of different lengths, has the merits of ultra-wide delay bandwidth, very high delay accuracy and easy controlling. As one of the key components in microwave photonic beamforming system, OSDLs have drawn great attentions and various integrated OSDL chips have been demonstrated. Among them, the SOI (silicon-on -insu- lator) and Si3N4 (silicon nitride) are the most popular platforms to fabricate OSDL chips due to their CMOS compatibilities. Nevertheless, the performances and characteristics of the OSDL chips fabricated on the three mainstream platforms have not been compared, which make it difficult to fair evaluate different technologies, which can provide useful guidance for real OSDL applications. To this end, we have designed, fabricated and packaged three OSDL chips based on SOI (The waveguide core thickness is 220 nm and 3 mu m respectively) and Si3N4 (double strip silicon nitride waveguide) on three photonic integration pilot lines successively. The per- formances of the fabricated OSDL chips were investigated and compared comprehensively, including the power consumption, switching time and fiber to fiber insertion loss. Then, the delay times of the three OSDLs were measured, which agree with our design very well. Finally, some discussions and future performance improve- ment methods of these OSDL chips are given.

引用

页数：14

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