Hardware-Software Co-Simulation for SOC Functional Verification

被引：0
|
作者：
严迎建
刘明业
机构：
[1] Beijing Institute of Technology
[2] Beijing100081
[3] China
[4] PLA Information Engineering University
[5] School of Electronic Technology
[6] School of Information Science and Technology
[7] Zhengzhou450004
来源：
Journal of Beijing Institute of Technology | 2005年 / 02期
关键词：
system-on-a-chip; co-simulation; instruction set simulator; event-driven hardware simulator;
D O I：
10.15918/j.jbit1004-0579.2005.02.003
中图分类号：
TN402 [设计];
学科分类号：
080903 ; 1401 ;
摘要：
A hardware-software co-simulation method for system on chip (SOC) design is discussed. It is based on an instruction set simulator (ISS) and an event-driven hardware simulator, and a bus interface model that is described in C language provides the interface between the two. The bus interface model and the ISS are linked into a singleton program--the software simulator, which communicate with the hardware simulator through Windows sockets. The implementation of the bus interface model and the synchronization between hardware and software simulator are discussed in detail. Co-simulation control of the hardware simulator is also discussed.
引用
收藏
页码：121 / 125
页数：5
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