FPGA-Based Efficient Programmable Polyphase FIR Filter

被引：3

作者：

陈禾

熊承欢

仲顺安

王华

机构：

[1] Beijing Institute of Technology

[2] Beijing100081

[3] China

[4] School of Information Science and Technology

来源：

Journal of Beijing Institute of Technology | 2005年 / 01期

关键词：

finite impulse response (FIR) filter; polyphase; field programmable gate array (FPGA);

D O I：

10.15918/j.jbit1004-0579.2005.01.002

中图分类号：

TN713 [滤波技术、滤波器];

学科分类号：

080902 ;

摘要：

The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automatically according to the programmable configuration word including symmetry/asymmetry, odd/even taps, from 32 taps up to 256 taps. The filter with 12 bit signal and 12 bit coefficient word-length has been realized on a Xilinx VirtexⅡ-v1500 device and operates at the maximum sampling frequency of (160 MHz.)

引用

页码：4 / 8

页数：5

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