Novel Test Approach for Interconnect Resources in Field Programmable Gate Arrays

被引:0
|
作者
Yong-Bo Liao
机构
关键词
Configurable logic blocks; configuretion pattern; field programmable gate arrays; interconnect resources test; switch box;
D O I
暂无
中图分类号
TN791 [];
学科分类号
080902 ;
摘要
A novel test approach for interconnect resources (IRs) in field programmable gate arrays (FPGA) has been proposed.In the test approach,SBs (switch boxes) of IRs in FPGA has been utilized to test IRs.Furthermore,configurable logic blocks (CLBs) in FPGA have also been employed to enhance driving capability and the position of fault IR can be determined by monitoring the IRs associated SBs.As a result,IRs can be scanned maximally with minimum configuration patterns.In the experiment,an in-house developed FPGA test system based on system-on-chip (SoC) hardware/software verification technology has been applied to test XC4000E family of Xilinx.The experiment results revealed that the IRs in FPGA can be tested by 6 test patterns.
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页码:85 / 89
页数:5
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