CORE-UNIFIED SOC TEST DATA COMPRESSION AND APPLICATION

被引:0
|
作者
Yi Maoxiang Guo Xueying Liang Huaguo Wang Wei Zhang Lei(Department of Electronic Science and Technology
机构
关键词
System-on-Chip(SoC); Test application time; Pattern run-length; X-propagation; Union test; Reconfiguration;
D O I
暂无
中图分类号
TN47 [大规模集成电路、超大规模集成电路];
学科分类号
摘要
The pattern run-length coding test data compression approach is extended by introducing don’t care bit(x) propagation strategy into it.More than one core test sets for testing core-based System-on-Chip(SoC) are unified into a single one,which is compressed by the extended coding technique.A reconfigurable scan test application mechanism is presented,in which test data for multiple cores are scanned and captured jointly to make SoC test application more efficient with low hardware overhead added.The proposed union test technique is applied to an academic SoC embedded by six large ISCAS’89 benchmarks,and to an ITC’ 02 benchmark circuit.Experiment results show that compared with the existing schemes in which a core test set is compressed and applied independently of other cores,the proposed scheme can not only improve test data compression/decompression,but also reduce the redundant shift and capture cycles during scan testing,decreasing SoC test application time effectively.
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页码:79 / 87
页数:9
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