3D integration review

被引：0
|
作者：
FAROOQ Mukta G. [1 ]
IYER Subramanian S. [1 ]
机构：
[1] IBM Corporation, Semiconductor Research & Development Center, Hopewell Junction, NY 12533, USA
来源：
Science China(Information Sciences) | 2011年 / 54卷 / 05期
关键词：
3D integration; embedded memory; through silicon via; die stacking;
D O I：
暂无
中图分类号：
TN32 [半导体三极管（晶体管）];
学科分类号：
0805 ; 080501 ; 080502 ; 080903 ;
摘要：
3-D integration delivers value by increasing the volumetric transistor density with the potential benefit of shorter electrical path lengths through use of the shorter third dimension. Several researchers have studied various aspect of 3Di such as bonding level, through silicon via processes and integration, thermomechanical reliability of the vias, and the impact of the vias on devices. In this paper, we review some of the literature with a view to understanding the key options and challenges in 3Di. We also discuss some important applications of this technology, and the constraints that have to be overcome to make it work.
引用
收藏
页码：1012 / 1025
页数：14
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