Device Physics Research for Submicron and Deep Submicron Space Microelectronics Devices and Integrated Circuits

被引:0
|
作者
Huang Chang
机构
关键词
GaAs; MESFET; CMOS; Device Physics Research for Submicron and Deep Submicron Space Microelectronics Devices and Integrated Circuits; MOSFET; length;
D O I
暂无
中图分类号
学科分类号
摘要
Device physics research for submicron and deep submicron space microelectronics devicesand integrated circuits will be described in three topics. 1. Thin film submicron and deep submicron SOS / CMOS devices and integrated circuits. 2. Deep submicron LDD CMOS devices and integrated circuits. 3. C band and Ku band microwave GaAs MESFET and Ⅲ-V compound hetrojunctionHEMT and HBT devices and integrated circuits.1. Thin Film Submicron and Deep Submicron SOS / CMOS Devices and Integrated Cir-cuitsBy making use of the total quantity of carriers method, we have analyzed in details the be-havior of thin film (0.06-0.2μm) SOS/ MOS structure. This is the foundation for devicephysics of thin film SOI / MOSFET devices and integrated circuits.
引用
收藏
页码:3 / 4 +6-2
页数:4
相关论文
共 50 条
  • [21] LP/LV circuits in the deep submicron area
    Borel, J
    1997 2ND IEEE-CAS REGION 8 WORKSHOP ON ANALOG AND MIXED IC DESIGN, PROCEEDINGS, 1997, : 8 - 13
  • [22] Experimental Study of Single Event Upsets on Deep Submicron and Nano Devices in Space
    Yu, Qingkui
    Sun, Yi
    Luo, Lei
    Mei, Bo
    Wei, Zhichao
    Zhu, Ming
    Tang, Min
    Liu, Shufen
    2017 PROGNOSTICS AND SYSTEM HEALTH MANAGEMENT CONFERENCE (PHM-HARBIN), 2017, : 1175 - 1178
  • [23] Front end defects on deep submicron devices
    Neo, S. P.
    Loh, S. K.
    Song, Z. G.
    Zhao, S. P.
    2006 IEEE INTERNATIONAL CONFERENCE ON SEMICONDUCTOR ELECTRONICS, PROCEEDINGS, 2006, : 693 - +
  • [25] Current Testing Procedure for Deep Submicron Devices
    Anton Chichkov
    Dirk Merlier
    Peter Cox
    Journal of Electronic Testing, 2001, 17 : 219 - 224
  • [26] Suppression of boron diffusion in deep submicron devices
    Gribelyuk, Michael A.
    Oldiges, Phil
    Ronsheim, Paul A.
    Yuan, Jun
    Kimball, Leon
    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 2011, 29 (06):
  • [27] Power Optimization Techniques for Deep Submicron Devices
    Senthilrani, S.
    Suganthi, M.
    JOURNAL OF NANOELECTRONICS AND OPTOELECTRONICS, 2013, 8 (04) : 383 - 389
  • [28] Current testing procedure for deep submicron devices
    Chichkov, A
    Merlier, D
    Cox, P
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2001, 17 (3-4): : 219 - 224
  • [29] Current testing procedure for deep submicron devices
    Chichkov, A
    Merlier, D
    Cox, P
    IEEE EUROPEAN TEST WORKSHOP, PROCEEDINGS, 2000, : 91 - 96
  • [30] Fault tolerant techniques for integrated circuits in submicron and nanotechnologies
    Bacivarov, Angelica
    ADVANCED TOPICS IN OPTOELECTRONICS, MICROELECTRONICS, AND NANOTECHNOLOGIES III, 2007, 6635