Multifunctional In-Memory Analog-to-Digital Converter for Next-Gen Compute-in-Memory Systems

被引:0
|
作者
Im, Jiseong [1 ]
Ko, Jonghyun [1 ]
Hwang, Joon [1 ]
Kim, Jangsaeng [1 ]
Shin, Wonjun [2 ]
Koo, Ryun-Han [1 ]
Park, Minkyu [1 ]
Park, Sung-Ho [1 ]
Choi, Woo Young [1 ]
Kim, Jae-Joon [1 ]
Lee, Jong-Ho [1 ]
机构
[1] Seoul Natl Univ, Coll Engn, Interuniv Semicond Res Ctr, Dept Elect & Comp Engn, Seoul 08826, South Korea
[2] Sungkyunkwan Univ, Dept Semicond Convergence Engn, Suwon 16419, South Korea
基金
新加坡国家研究基金会;
关键词
analog-to-digital converter; compute-in-memory; flash thin-film-transistor; hardware-based artificial intelligence; neuromorphic computing; CMOS;
D O I
10.1002/aisy.202400594
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Compute-in-memory (CIM) technology based on emerging nonvolatile memories (NVMs) has shown promise in enhancing artificial intelligence applications by integrating computation directly within NVM arrays. However, the efficiency of CIM systems is often curtailed by the substantial overhead that is caused by traditional complementary metal-oxide-semiconductor (CMOS)-based analog-to-digital converters (ADCs). Here, we report an in-memory ADC (IMADC) that leverages NVMs to perform the dual functionalities of reference generation and voltage comparison, effectively minimizing the area occupancy and energy consumption, is reported. The IMADC not only significantly outperforms traditional ADCs but also enables the inherent processing of nonlinear activation functions such as the sigmoid function, which is required for neural networks. The IMADC-based CIM system achieves software-comparable accuracy in CIFAR-10 image classification on the VGG-9 network. The IMADC exhibits significantly reduced area occupancy (45 mu m2) and energy consumption (29.6 fJ) compared to conventional CMOS-based ADCs. The IMADC, compatible with various types of NVMs, demonstrates significant potential for enhancing the efficiency of CIM systems in terms of area occupancy and energy consumption.
引用
收藏
页数:9
相关论文
共 50 条
  • [1] Analog-to-Digital Converter Design Exploration for Compute-in-Memory Accelerators
    Jiang, Hongwu
    Li, Wantong
    Huang, Shanshi
    Cosemans, Stefan
    Catthoor, Francky
    Yu, Shimeng
    IEEE DESIGN & TEST, 2022, 39 (02) : 48 - 55
  • [2] A/D Alleviator: Reducing Analog-to-Digital Conversions in Compute-In-Memory with Augmented Analog Accumulation
    Cao, Weidong
    Zhang, Xuan
    2023 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS, 2023,
  • [3] Compute-in-Memory with 6T-RRAM Memristive Circuit for Next-Gen Neuromorphic Hardware
    Bai, Kang Jun
    Jiang, Hao
    2024 NEURO INSPIRED COMPUTATIONAL ELEMENTS CONFERENCE, NICE, 2024,
  • [4] Analog Compute-in-Memory For AI Edge Inference
    Fick, D.
    2022 INTERNATIONAL ELECTRON DEVICES MEETING, IEDM, 2022,
  • [5] Digital to Pulse Converter for Analog in Memory Compute Applications.
    Naik, Sanmitra Bharat
    Iqbal, Asif
    2023 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, APCCAS, 2024, : 60 - 64
  • [6] Accuracy and Resiliency of Analog Compute-in-Memory Inference Engines
    Wan, Zhe
    Wang, Tianyi
    Zhou, Yiming
    Iyer, Subramanian S.
    Roychowdhury, Vwani P.
    ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 2022, 18 (02)
  • [7] Logic-Compatible Embedded DRAM Architecture for Multifunctional Digital Storage and Compute-in-Memory
    Kim, Taehoon
    Chung, Yeonbae
    APPLIED SCIENCES-BASEL, 2024, 14 (21):
  • [8] Next-gen digital signal controller ICs offer 4× more memory
    Davis, Sam
    Power Electronics Technology, 2010, 36 (05): : 39 - 43
  • [9] RRAM fabric for neuromorphic and reconfigurable compute-in-memory systems
    Zidan, Mohammed A.
    Lu, Wei D.
    2019 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2019,
  • [10] RRAM fabric for neuromorphic and reconfigurable compute-in-memory systems
    Zidan, Mohammed A.
    Lu, Wei D.
    2018 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC), 2018,