(Invited) Redefining Outliers for On-Wafer Electrical Testing

被引:0
|
作者
Shintani, Michihiro [1 ]
Sato, Takashi [2 ]
机构
[1] Kyoto Inst Technol, Kyoto, Japan
[2] Kyoto Univ, Kyoto, Japan
来源
PROCEEDINGS OF THE 2024 ACM/IEEE INTERNATIONAL SYMPOSIUM ON MACHINE LEARNING FOR CAD, MLCAD 2024 | 2024年
关键词
Electrical testing; Outlier detection; Gaussian process regression;
D O I
10.1145/3670474.3689186
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Electrical testing of semiconductor devices is a critical process for ensuring their quality and reliability. Despite the existence of the standard dynamic part average test (DPAT), the detection of outliers that deviate from the spatial trend within a wafer remains challenging because the distinction between good and defective devices is not always clear. This paper presents an overview of two recently proposed outlier detection methods utilizing Gaussian process regression (GPR) in the context of electrical device testing. Experiments on real wafers show that even a simple application of GPR can outperform DPAT in terms of detection performance. The integration of GPR and ensemble learning further facilitates the development of outlier detection methods, enhancing detection performance and reducing computation time.
引用
收藏
页数:7
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