A Packet-based Analog m-CAP Visible Light Communication System for Internet of Things

The Internet connectivity in electronic devices has been progressively increasing over the years. While radio frequency (RF)-based communications dominate Internet of Things (IoT) applications, they face some issues such as interference and spectrum limitations. Visible light communications (VLC) uses light emitting diodes (LEDs) lights with intensity modulation to convey the signal and it has been demonstrated as a viable alternative for indoor IoT scenarios. On the other hand, data clock synchronization between the transmitter (Tx) and the receiver (Rx) is crucial for reliable data transmission, mitigating timing errors and packet losses. Typical implementations are complex and require high-speed processing. This paper introduces an algorithm for data clock synchronization in a hybrid multiband carrierless amplitude and phase (m-CAP)/quadrature amplitude modulation(QAM) VLC system for IoT devices, ensuring accurate clock recovery that can be implemented in a low-cost microcontroller. The system achieves synchronization with a clock mismatch tolerance of up to 4200 ppm, supporting frames with a payload length up to 624 octets. By using averaging window sampling instead of a single sample acquisition, it is possible an extension of the payload length by approximately 208 octets.