THNAS-GA: A Genetic Algorithm for Training-free Hardware-aware Neural Architecture Search

被引:0
|
作者
Hai Tran Thanh [1 ]
Long Doan [2 ]
Ngoc Hoang Luong [3 ,4 ]
Huynh Thi Thanh Binh [1 ]
机构
[1] Hanoi Univ Sci & Technol, Hanoi, Vietnam
[2] George Mason Univ, Fairfax, VA USA
[3] Univ Informat Technol, Ho Chi Minh City, Vietnam
[4] Vietnam Natl Univ, Ho Chi Minh City, Vietnam
关键词
neural architecture search; genetic algorithm;
D O I
10.1145/3638529.3654226
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Neural Architecture Search (NAS) is a promising approach to automate the design of neural network architectures, which can find architectures that perform better than manually designed ones. Hardware-aware NAS is a real-world application of NAS where the architectures found also need to satisfy certain requirements for the deployment of specific devices. Despite the practical importance, hardware-aware NAS still receives a lack of attention from the community. Existing research mostly focuses on the search space with a limited number of architectures, reducing the search process to finding the optimal hyperparameters. In addition, the performance evaluation of found networks is resources-intensive, which can severely hinder reproducibility. In this work, we propose a genetic algorithm approach to the hardware-aware NAS problem, incorporating a latency filtering selection to guarantee the latency validity of candidate solutions. We also introduce an extended search space that can cover various existing architectures from previous research. To speed up the search process, we also present a method to estimate the latency of candidate networks and a training-free performance estimation method to quickly evaluate candidate networks. Our experiments demonstrate that our method achieves competitive performance with state-of-the-art networks while maintaining lower latency with less computation requirements for searching.
引用
收藏
页码:1128 / 1136
页数:9
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