Static IR Block Power Assignment Methodology for Mixed Signal Designs

被引:0
|
作者
Huddar, Vinod Arjun [1 ]
Park, Shinyoung [2 ]
机构
[1] Rambus Inc, Bufferchip, Bangalore, Karnataka, India
[2] Rambus Inc, Bufferchip, Seoul, South Korea
关键词
power integrity; IR drop; BPA; simulation; PDN;
D O I
10.1109/ICEPT56209.2022.9873108
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
On-chip metal routings are resistive in nature, due to thin metal layers, causing voltage drop (IR drop) on the on-die power network. Using iterative block power assignment flow (BPA), we can identify critical blocks in design and non-critical blocks based on their current requirement and boil down further into sub-blocks to assign right currents to each transistor. Using the presented current assignment approach, accurate IR drop prediction can be achieved with resolution down to every single transistor in critical blocks and at same time reduce massive full chip simulation times.
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页数:3
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