Research on Pull-off Strength Test Method of Cross-Surface SiP device

With the continuous shrinking of the integrated circuit process, Moore's Law has been severely challenged[1]. The semiconductor industry is entering the post-Moore era, and various packaging technologies have been rapidly developed. However, for SiP device with different surface structure(Cross-Surface SiP), it is difficult to implement the pull-off strength test of the interposer due to multiple chips are inverted on the interposer at the same time, and the sizes and heights of each chip are different. At present, there is no universal test standard in the industry. This paper proposes two specific pull- off strength test methods based on a Cross-Surface SiP device. Experimental research was carried out by preparing test samples and designing necessary tools. The test results show that both test methods can meet the requirements of GJB548C-2031 for chip pull-off strength test, and the results are qualified. Constructing the device geometry model by industrial software, and the trend of stress and strain at multiple positions of the device during loading was analyzed and compared by two pull-off strength test methods through simulation. The simulation results show that the first test method will cause uneven stress distribution. In the test process, the uneven stress distribution may cause other effects outside the test. During the loading process of the second test method, the stress is uniform which can better meet the loading requirements in the test standards.<bold> </bold>