Invited Paper: A Review on Ultra-Low-Supply-Voltage Analog-to-Digital Converters

被引：0
|
作者：
Christie, Eric [1 ]
Smith, Shea [1 ]
Kong, Long [2 ]
Chen, Chia-Hung [3 ]
Chiang, Shiuh-hua Wood [3 ]
机构：
[1] Brigham Young Univ, Provo, UT 84602 USA
[2] Apple, Cupertino, CA USA
[3] Natl Yang Ming Chiao Tung Univ, Hsinchu, Taiwan
来源：
2024 IEEE 67TH INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, MWSCAS 2024 | 2024年
关键词：
Analog-to-digital converter (ADC); Ultra-low supply voltage; Ultra-low power; subthreshold operation;
D O I：
10.1109/MWSCAS60917.2024.10658818
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
Ultra-low-supply-voltage (ULV) analog-to-digital converters (ADCs) operating at around 0.2 V or lower are attractive for internet-of-things (IoT) and embedded applications due to their extremely low power consumption. This paper reviews state-of-the-art ULV ADCs to provide insight on the current trends and design strategies at such low supply voltages. The paper discusses the various architectures, topologies, and calibration techniques used and their trade-offs. Based on the observations, the paper provides recommendations for the circuit designer to help make informed design choices to achieve the desired performance for ULV ADCs.
引用
收藏
页码：1217 / 1221
页数：5
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