Detailed analysis and electrical modeling of gate oxide shorts in MOS transistors

被引:0
|
作者
Balearic Islands Univ, Palma de Mallorca, Spain [1 ]
机构
来源
关键词
D O I
暂无
中图分类号
学科分类号
摘要
引用
收藏
相关论文
共 50 条
  • [31] Computing stress tests for gate-oxide shorts
    Dabholkar, V
    Chakravarty, S
    ELEVENTH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 1997, : 378 - 381
  • [32] TDCIV extraction of dopant-impurity concentration and oxide thickness in ultrathin gate oxide MOS transistors
    Jie, BB
    Sah, CT
    2004: 7TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUITS TECHNOLOGY, VOLS 1- 3, PROCEEDINGS, 2004, : 1208 - 1211
  • [33] Leakage current due to plasma induced damage in thin gate oxide MOS transistors
    Sridharan, A
    Oh, J
    Werking, J
    Brozek, T
    Viswanathan, CR
    1997 2ND INTERNATIONAL SYMPOSIUM ON PLASMA PROCESS-INDUCED DAMAGE, 1997, : 29 - 32
  • [34] Oscillator Based on Suspended Gate MOS Transistors
    Rusu, A.
    Mazza, M.
    Chauhan, Y. S.
    Ionescu, A. M.
    ROMANIAN JOURNAL OF INFORMATION SCIENCE AND TECHNOLOGY, 2008, 11 (04): : 423 - 433
  • [35] Statistical modeling of MOS transistors
    Conti, M.
    Crippa, P.
    Orcioni, S.
    Turcbetti, C.
    International Workshop on Statistical Metrology, Proceedings, IWSM, 1998, : 92 - 95
  • [36] Transient current testing of gate-oxide shorts in CMOS
    Chehab, Ali
    Kayssi, Ayman
    Ghandour, Ali
    IDT 2007: SECOND INTERNATIONAL DESIGN AND TEST WORKSHOP, PROCEEDINGS, 2007, : 77 - 81
  • [37] Numerical simulation and modeling of static characteristics and electrical noise in submicron MOS transistors
    Fadlallah, M
    Ghibaudo, G
    Jomaah, J
    Zoaeter, R
    ICECS 2000: 7TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS & SYSTEMS, VOLS I AND II, 2000, : 940 - 943
  • [38] Gate Oxide Electrical Stability of p-type Diamond MOS Capacitors
    Loto, O.
    Florentin, M.
    Masante, C.
    Donato, N.
    Hicks, M. -L.
    Pakpour-Tabrizi, A. C.
    Jackman, R. B.
    Zuerbig, V.
    Godignon, P.
    Eon, D.
    Pernot, J.
    Udrea, F.
    Gheeraert, E.
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2018, 65 (08) : 3361 - 3364
  • [39] MODELING AND SIMULATION OF GATE-CATHODE JUNCTION OF A THYRISTOR WITH AMPLIFYING GATE AND EMITTER SHORTS
    Zekry, Abdel Halim A.
    Sayah, Gihan T.
    PROCEEDINGS OF THE 2ND INTERNATIONAL CONFERENCE ON ADVANCED COMPUTER THEORY AND ENGINEERING (ICACTE 2009), VOLS 1 AND 2, 2009, : 851 - 858
  • [40] GATE MISALIGNMENT EVALUATION METHOD FOR COMMERCIAL MOS TRAPEZOIDAL GATE TRANSISTORS
    Sabbadin, D. S.
    Giacomini, R. C.
    2014 INTERNATIONAL CARIBBEAN CONFERENCE ON DEVICES, CIRCUITS AND SYSTEMS (ICCDCS), 2014,